First Demonstration of Computing-in-Memory cell based on 1T-1MFMIS FeFET Featuring 2.3 V Large MW and Multi-bit Retention > 10 years

초록

Computing-in-Memory (CiM) is a promising solution to the von Neumann "memory wall,"yet its realization has been limited by the narrow memory windows (MWs) of conventional devices, restricting reliable multi-level operation. In this work, we present the first demonstration of a CiM cell based on a 1T-1MFMIS FeFET structure, where an AOS FET is employed as the write transistor and an MFMIS FeFET serves as the read transistor. By engineering the area ratio between the a-IGZO channel and ferroelectric capacitor, we achieve a wide MW of 2.3 V, enabling robust multi-level program/erase operation. The device further exhibits endurance beyond 10 cycles, extrapolated retention over 10 years, and stable multi-bit states for over 1000 seconds. These results overcome longstanding erase and MW challenges in oxide-semiconductor FeFETs and highlight the potential of 1T-1MFMIS FeFETs for next-generation CiM applications. © 2026 IEEE.

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