Wrapping Amorphous Indium-Gallium-Zinc-Oxide Transistors with High Current Density

  • Liu, Jiaxin; 
  • Huang, Shan; 
  • Xiao, Zhenyuan; 
  • Li, Ning; 
  • Kim, Jaekyun; 
  • 외 2명
Citations

SCOPUS

3

초록

Amorphous oxide semiconductor transistors with a high current density output are highly desirable for large-area electronics. In this study, wrapping amorphous indium-gallium-zinc-oxide (a-IGZO) transistors are proposed to enhance the current density output relative to a-IGZO source-gated transistors (SGTs). Device performances are analyzed using technology computer-aided design (TCAD) simulations. The TCAD simulation results reveal that, with an optimized device structure, the current density of the wrapping a-IGZO transistor can reach 7.34 μA/μm, representing an approximate two-fold enhancement compared to that of the a-IGZO SGT. Furthermore, the optimized wrapping a-IGZO transistor exhibits clear flat saturation and pinch-off behavior. The proposed wrapping a-IGZO transistors show significant potential for applications in large-area electronics. © 2025 by the authors.

키워드

amorphous indium–gallium–zinc oxide; current density; source-gated transistor; thin-film transistor; wrapping transistor
제목
Wrapping Amorphous Indium-Gallium-Zinc-Oxide Transistors with High Current Density
저자
Liu, Jiaxin; Huang, Shan; Xiao, Zhenyuan; Li, Ning; Kim, Jaekyun; Jin, Jidong; Zhang, Jiawei
DOI
10.3390/electronicmat6010002
발행일
2025-03
유형
Article
저널명
Electronic Materials
권
6
호
1