높은 PSRR을 갖는 Low-Dropout(LDO) 레귤레이터

초록

As IoT industry are growing fast, The importance of power management system is also being magnified. CMOS High power-supply rejection ratio(PSRR) Low-dropout(LDO) regulator is achieved by the proposed ripple Subtractor, Feed-forward capacitor and OTA in this paper. The LDO is implemented in 0.18- CMOS technology. With the proposed structures, in the maximum loading of 40mA, Simulation result achieves PSRR of –73.4dB at 500kHz and PSRR better than –40dB when frequency is below 10MHz with 6.8- output capacitor.

키워드