상세 보기
Impact of Post-Annealing on Electrical Characteristics of Vertical CAA FETs
- Wang, Zewei;
- Chen, Simin;
- Ju, Gijun;
- Han, Jaehoon;
- Kim, Younghyun
SCOPUS
0초록
In this study, we systematically investigated the stability of amorphous indium gallium zinc oxide (α-IGZO) vertical channel all-around (CAA) field-effect transistors (FETs) before and after post-annealing. By varying the annealing temperature and time, the optimal condition was identified based on the threshold voltage (VTH) and on-state current (Ion), resulting in improved transfer characteristics. Post-annealing also alleviated short-channel effects, as shown by suppressed drain-induced barrier lowering (DIBL) and reduced current crowding. Under positive bias temperature stress (PBTS), ΔVTH decreased from 1.55 V to 0.2 V, confirming enhanced stability. These results demonstrate that optimized post-annealing effectively improves both electrical performance and reliability of α-IGZO vertical CAA FETs, supporting their application in high-density memory and advanced electronics. © 2026 IEEE.
키워드
- 제목
- Impact of Post-Annealing on Electrical Characteristics of Vertical CAA FETs
- 저자
- Wang, Zewei; Chen, Simin; Ju, Gijun; Han, Jaehoon; Kim, Younghyun
- 발행일
- 2026-05
- 유형
- Conference paper
- 저널명
- 10th IEEE Electron Devices Technology and Manufacturing Conference: Emerging Semiconductor Devices and Manufacturing Technologies, EDTM 2026