W-CDMA 단말기용 Balanced 전력증폭기의 Load Insensitivity 분석

초록

The load-insensitivity of the balanced power amplifier(PA) for W-CDMA handset applications is analyzed. The load impedances of the two parallel amplifiers in the balanced PA depending on the output load mismatch are mathematically calculated and with the result, the phase of reflection coefficient at which the linear output power is severely degraded is investigated. From the analysis, we proposed that the linearity of the balanced PA at the phase can be improved by properly increasing the transistor size and thus, multiple balanced PA's with different transistor size are designed and simulated. The simulation result showed that the balanced PA with larger transistor size has improved linear output power under VSWR=4:1.

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