A Robust DT Σ Modulator for High-Resolution Sensor Against Temperature Variations

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초록

This paper presents a 1-bit third-order delta-sigma modulator for high-resolution sensors. By sharing digital-to-analog converter (DAC) and sampling capacitors, we mitigate the influence of KT/C noise, while enhancing resolution through a chopping technique and internal feedback loop. The prototype chip is fabricated in a 28-nm CMOS process with an area of 0.122 mm2. It achieves a peak signal-to-noise ratio (SNR) of 83.6 dB and a peak signal-to-noise and distortion ratio (SNDR) of 81.6 dB in a 20 kHz signal bandwidth while consuming 13.3 mW from a 1.8 V power supply. © 2024 IEEE.

키워드

Analog-to-digital converter (ADC)discrete-time delta-sigma modulator (DTDSM)feedback digital-to-analog converter (DAC)
제목
A Robust DT Σ Modulator for High-Resolution Sensor Against Temperature Variations
저자
Choi, JihunNa, SangwookKim, TaehunRoh, Jeongjin
DOI
10.1109/ISOCC62682.2024.10762184
발행일
2024-11
유형
Proceedings Paper
저널명
2024 21ST INTERNATIONAL SOC DESIGN CONFERENCE, ISOCC
페이지
75 ~ 76