A Compact Slew-Rate-Enhanced Class-AB Buffer Amplifier Using Internal Current Reuse for Display Column Drivers

초록

High-resolution and high-frame-rate display systems impose increasingly stringent timing constraints on columndriver buffer amplifiers due to the drastic reduction of 1-horizontal (1-H) time. Although slew-rate enhancement (SRE) is essential to meet these constraints, conventional SRE techniques rely on explicit slew-sensing circuits and dynamic current sources (DCSs), introducing unavoidable static current and area overheads that severely limit scalability in multi-channel columndriver ICs. This paper proposes a compact SRE class-AB buffer amplifier that improves large-signal transition speed through transient-only internal current reuse, without external sensing circuits or DCSs. Slewing detection and enhancement are embedded directly into the signal path using only two ( )diode-connected transistors, which remain inactive during steady-state operation, achieving zero static-current penalty and negligible area overhead while preserving the traditional amplifier's stability. Fabricated in a 0.18-& micro;m CMOS process, the proposed amplifier achieves a 2.1 & times; slew rate improvement (from 0.8 V/& micro;s to 1.7 V/& micro;s) under a 3.3-V supply and a 30 pF load, while maintaining an identical static current of 2.2 & micro;A. The additional area required is only 2 & micro;m(2) (0.3% increase), with no change in overall layout dimensions. Measurements demonstrate that the proposed amplifier meets the 1-H timing constraint of a 4K display operating at 120 Hz. To evaluate scalability in highly replicated analog systems, this work analyzes the trade-off between slewrate performance and implementation overhead. The results demonstrate that the proposed design achieves sufficient slew-rate improvement to meet the target timing requirement with zero additional static current and minimal area overhead, ensuring highly scalable operation for next-generation, high-resolution display column-driver ICs

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