A 0.9-V 60-mu W 1-bit fourth-order delta-sigma modulator with 83-dB dynamic range

  • Roh, Jeongjin; 
  • Byun, Sanho; 
  • Choi, Youngkil; 
  • Roh, HyLingdong; 
  • Kim, Yi-Gyeong; 
  • 외 1명
Citations

WEB OF SCIENCE

128
Citations

SCOPUS

161

초록

A 0.9-V 60-mu W delta-sigma modulator is designed using standard CMOS 0.13-mu m technology. The modulator achieves 83-dB dynamic range in a signal bandwidth of 20 kHz with a sampling frequency of 2 MHz. The input-feedforward architecture is used to reduce the voltage swing of the integrators, which enables low-power amplifiers. By considering the characteristics of the modulator architecture, low-quiescent operational transconductance amplifiers are designed, which use positive feedback to increase dc gain. The designed modulator shows very high figure of merit among the state-of-the-art sub-I-V modulators.

키워드

low power; low voltage; operational transconductance amplifier; sigma-delta modulation; switched capacitator circuits; AUDIO ADC; LEAKAGE; SWITCH
제목
A 0.9-V 60-mu W 1-bit fourth-order delta-sigma modulator with 83-dB dynamic range
저자
Roh, Jeongjin; Byun, Sanho; Choi, Youngkil; Roh, HyLingdong; Kim, Yi-Gyeong; Kwon, Jong-Kee
DOI
10.1109/JSSC.2007.914266
발행일
2008-02
유형
Article
저널명
IEEE Journal of Solid-State Circuits
권
43
호
2
페이지
361 ~ 370