System-Level Modeling of Single-Phase Solid-State Transformers for High-Speed, Resource-Efficient FPGA-Based Real-Time Simulation

초록

A Field-Programmable Gate Array (FPGA)-based system-level Real-Time (RT) simulator is an effective solution for efficiently and safely validating control systems before the actual operation of power converters. As power semiconductor technology advances, the switching frequency of power converters continues to increase, requiring RT simulators to perform plant-related numerical computations within extremely short time steps. However, when multiple power converters are connected in series or parallel, as in a Solid-State Transformer (SST), the computational burden increases significantly, limiting the achievable simulation time step. Therefore, a modeling approach is required that enables accurate and fast numerical computation while maintaining low resource consumption. This paper proposes a high-speed and hardware resource-efficient modeling method for Full-Bridge (FB) converters, which serve as the basic topology of Active Front-End (AFE) and Dual Active Bridge (DAB) converters commonly adopted in bidirectional single-phase SSTs, and further presents a method to extend this modeling approach for implementing SSTs. © 2026 IEEJ-IAS.

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