A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors

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초록

In this brief, we present a capacitance-to-digital converter (CDC) for one-terminal capacitive sensors. The designed CDC implements a digital correction technique to reduce non-idealities and noises, such as the offset, 1/f noise, and power supply noise. This correction technique can also minimize effectively the complexity of the analog front-end circuit. All sensor functions, including analog circuits (delta-sigma CDC, bandgap reference, and voltage regulator) and digital logics (microprocessor, memories, and interface logics), are integrated into a single chip and occupy approximately 90% of the area. The chip is fabricated in a 0.18-mu m standard CMOS process, which does not have a deep n-well stage. The analog and digital circuits, including the digital input/output pads, must share the same substrate in this design. However, the measurement results demonstrate highly effective resolutions of 16 to 17.4 b, which are achieved with different conversion times.

키워드

Capacitance-to-digital converter (CDC); delta-sigma modulation; one-terminal capacitive sensor
제목
A 17.4-b Delta-Sigma Capacitance-to-Digital Converter for One-Terminal Capacitive Sensors
저자
Jung, Youngjae; Duan, Quanzhen; Roh, Jeongjin
DOI
10.1109/TCSII.2015.2505960
발행일
2017-10
유형
Article
저널명
IEEE Transactions on Circuits and Systems II: Express Briefs
권
64
호
10
페이지
1122 ~ 1126