A 103.9-dB SNDR 5-kHz BW Continuous-Time Dynamic Zoom ADC with Switched Resistor Technique for Reducing Thermal Noise

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초록

In this paper, we present a 36 μW continuous-time Zoom (CT-Zoom) ADC with the switched resistor (SR) technique to reduce both the noise and area. The proposed CT-Zoom ADC effectively reduces in-band flicker noise using a chopped negative-R, and then further reduces in-band thermal noise by half through the use of the SR technique. This method halves the resistor in the first integrator, effectively solving the problem of thermal noise in CT-Zoom ADCs with a low-frequency signal bandwidth. The proposed dynamic CT-Zoom ADC exhibits post-layout simulation results with a peak signal-to-noise ratio (SNR) of 108.0 dB, a peak signal-to-noise and distortion ratio (SNDR) of 103.9 dB, and a total power consumption of 36 μW using a 1 V power supply, at a sampling frequency of 1.28 MHz for a 5-kHz signal bandwidth. The circuit was designed and simulated using the 28-nm CMOS process. © 2025 IEEE.

키워드

Analog-to-digital converter (ADC)continuous-time dynamic Zoom ADClow-power consumptionreduce thermal noiseswitched resistor
제목
A 103.9-dB SNDR 5-kHz BW Continuous-Time Dynamic Zoom ADC with Switched Resistor Technique for Reducing Thermal Noise
저자
Kim, JaedoKim, TaehunKim, YeonhongRoh, Jeongjin
DOI
10.1109/ISCAS56072.2025.11043440
발행일
2025-06
유형
Proceedings Paper
저널명
2025 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, ISCAS